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Universal High-Level Synthesis
April 20 @ 12:30 PM - 1:15 PM
We proudly present the lecture on Universal High-Level Synthesis by Kazutoshi Wakabayashi from the University of Tokyo
In recent years, high-level synthesis (HLS) has emerged as a promising approach for designing digital circuits. By enabling designers to express their designs using high-level programming languages, HLS can significantly reduce the time and effort required to design complex circuits. However, HLS has certain limitations when it comes to synthesizing complex data structures and recursive functions.
This talk introduces universal high-level synthesis, which can synthesize dynamic data structures such as linked lists, maps, and recursive functions. The generated circuits are pipelined and can run x100 faster than traditional CPU implementations. We also present our data-flow computing methodology using universal HLS and FPGAs. Our methodology can automatically parallelize complex C/C++ programs with control dependencies and imperfect nested conditionals.